1. Field of the Invention
The present invention relates to apparatus and methods for facilitating utilization of the acceleration data output of a closed-loop accelerometer. More particularly, this invention pertains to apparatus for converting the acceleration output to a form that is compatible with output data rates whose frequency is unrelated to the period of the accelerometer rebalance loop.
2. Description of the Prior Art
Many accelerometers include a pendulous proofmass for sensing acceleration relative to inertial space. Motion of the proofmass relative to the body of the accelerometer (and the object attached thereto) is induced by acceleration and the displacement of the proofmass provides a measure of the acceleration force.
The displacement versus acceleration characteristic of an accelerometer may be highly nonlinear. Such nonlinearity may be due to a number of factors. For example, in a silicon accelerometer that employs a hinged floating element between a pair of conductive plates, an inverse square relationship governs the force exerted upon the pendulous mass as it travels through the gap between charged conductive plates. Nonlinearities may also be introduced through the bending characteristics of the hinges that attach the pendulous mass to the body of the accelerometer. Such second order effects can produce a nonlinear stiffness response in the bent hinge as the pendulous mass is deflected through the gap.
In order to improve the accuracy of such accelerometers, it is therefore often essential that they operate in a closed-loop fashion. The force then required to maintain the null position of the pendulous mass, rather than displacement, provides the measure of acceleration. A rebalance loop is employed for this purpose and many rebalance techniques are available. Generally, the most effective techniques employ a modulation and forcing process that takes place at a specific frequency. The output of the accelerometer may be represented by a digital value that is equal to the duty cycle of the voltage rebalance waveform in voltage rebalance schemes. Alternatively, the digital value may represent the number of charge quanta applied in charge rebalance schemes.
Systems of the above type are often subject to problems arising from inconsistencies between the.sup.i accelerometer rebalance-cycle period and the data irate of the output utilization circuit. The rebalance-cycle period is fixed as is the output data rate and the resulting mismatches can lead to severe synchronization problems.